System Documents

This page lists various papers, reports and presentations that document the main system components of the Open Network Laboratory. Each section lists documents from the most general to the most detailed. Links to the more commonly referenced documents can also be found in the left margin.

Network Services Platform Overview

Design of a High Performance Dynamically Extensible Router, by Sumi Choi, John Dehart, Ralph Keller, Fred Kuhns, John Lockwood, Prashanth Pappu, Jyoti Parwatikar, W. David Richard, Ed Spitznagel, David Taylor, Jonathan Turner and Ken Wong. Proceedings of the DARPA Active Networks Conference and Exposition, 5/02. This paper provides an overview of the architecture, performance and use of the ONL router.

ATM Switch Core

Design of a Gigabit ATM Switch, by Tom Chaney, Andy Fingerhut, Margaret Flucke and Jonathan Turner. Proceedings of Infocom, 4/97. This paper describes the architecture and key features of the WUGS architecture.
System Architecture Document for Gigabit Switching Technology, by Zubin Dittia, J. Andrew Fingerhut and Jonathan Turner. This report is the definitive architectural reference for the WUGS architecture. It defines all the features of the chip set and describes how they work in considerable detail. Anyone developing their own hardware extensions to the switch or software to control the switch should be thoroughly familiar with this report.
The Gigabit Switch Link Interface Specification, by W. David Richard. This report defines the interface between the line cards that carry transmission interface circuitry and the IPP and OPP chips. This interface is also used by the FPX and SPC cards.

Field Programmable Port Extender

Field Programmable Port Extender (FPX) User Guide: Version 2.2, Washington University, Department of Computer Science, Technical Report WUCS-02-15, June, 2002. This paper is describes the FPX architecture and how it can be used to implement novel kinds of packet processing functions.
System-on-Chip Packet Processor for an Experimental Network Services Platform, by David E. Taylor, Alex Chandra, Yuhua Chen, Sarang Dharmapurikar, John W. Lockwood, Wenjing Tang, Jonathan S. Turner. Proceedings of IEEE Globecom, 12/03. This paper describes the design of the configurable logic used in the RAD to provide routine packet processing in the Network Services Processor.
Field-Programmable Port Extender (FPX) Support for the Network Services Platform NSP), by Alex Chandra, Yuhua Chen, John Dehart, Sarang Dharmapurikar, Fred Kuhns, John W. Lockwood, Wenjing Tang, David Taylor and Jonathan S. Turner. Washington University Computer Science and Engineering Department unpublished technical memorandum, 6/04. This report documents the internal design of the configurable logic that implements the packet processing functions in the FPX for Washington University's extensible router (aka, the Network Services Platform).
Scalable IP Lookup for Programmable Routers, by David E. Taylor, John W. Lockwood, Todd Sproull, Jonathan S. Turner, David B. Parlour. Proceedings of IEEE Infocom, 6/02. This paper describes the IP route lookup mechanism implemented by the FPX in the ONL router.
NID Documentation.
FPX Project Site. Comprehensive resource for information on the FPX.

Smart Port Card

Description of the SPC 2 Architecture.
FPGA Documentation.
Embedded Module Documentation
SPC 2 System Software

Line Cards

Gigabit Ethernet Line Card.
G-link Line Card.
OC-3 Line Card.

Control Processor Software

O. Matthew Beal. ``Jammer Language Description,'' (ps) or (pdf) . ARL Working Note 96-01.
This report describes the scripting languages that is used for composing test scripts for the WUGS switch.
John DeHart and Dakang Wu. ``Connection Management Network Protocol (CMNP) Specification,'' Applied Research Lab, 7/96.
This report describes Washington University's ATM signalling protocol.
John DeHart. ``Connection Management Software System,'' Applied Research Laboratory Working Note 95-03, 6/96.
This report describes the architecture of the software implementing Washington University's ATM switch control system.
John DeHart. ``Washington University Gigabit Network Software Installation and Start-up,'' Applied Research Laboratory Working Note 96-02, 6/96.
This report describes how to install the Washington University ATM switch control software and get started using it.
Dakang Wu and John DeHart. ``GBNSC: The GigaBit Network Switch Controller,'' Applied Research Laboratory Working Note 94-12, 7/96.
This report describes the switch control software for the WUGS switch. This is the low level software component that provides a convenient abstract switch API for use by higher level software.
Dakang Wu and John DeHart. ``Node Controller Managed Object,'' Applied Research Laboratory Working Note 96-03, 7/96.
This report defines the node controller, a software module that manages a collection of switches as though it were a single integrated entity.

APIC Network Interface

The APIC Approach to High Performance Network Interface Design: Protected DMA and other Technologies by Zubin Dittia, Guru Parulkar and Jerome R. Cox, Jr. Proceedings of Infocom 97. This report provides a good introduction to the APIC and a fairly detailed description of the features it provides.
APIC (ATM Port Interconnect Controller) by Zubin Dittia and Rex Hill. Applied Research Laboratory, Washington University, 1997. This is the data sheet for the APIC and defines all the signals and a high level description of its features.
Network Interfacing and Desk Area Networking with the APIC Chip, by Zubin Dittia, Guru Parulkar, Jerome R. Cox, Jr. and Rex Hill. This is a detailed slide presentation (60 pages) on the APIC design.
Register Manager Design, by Rex Hill. Applied Research Lab, August 1997. This report describes the various control registers used to manage the APIC. Essential reading for anyone planning to write a driver or planning to control the APIC directly from a user-space program.
APIC Cell Formats, by Rex Hill. Applied Research Lab, August 1997. This report defines the formats of all the control cells used to manage the APIC. Essential reading for anyone planning to write a driver or planning to control the APIC directly from a user-space program.
APIC Pacing Overview.

Maintained by Ken Wong: kenw@arl.wustl.edu, Updated 3/25/2005.